1. Field of the Invention
The present invention relates to a phase change nonvolatile memory device and a method of fabricating the same, and more particularly, to a phase-change memory device using a chalcogenide metal alloy composed of antimony (Sb) and selenium (Se), and a method of fabricating the same.
2. Description of the Related Art
Semiconductor memory devices are generally classified as either volatile or non-volatile. A DRAM (dynamic random access memory) is a typical volatile memory device. The DRAM needs a periodic refresh process to retain data. When the integration density of a memory device is low, the power consumption of the refresh process is insignificant. However, as the integration density becomes higher, the power consumption also increases greatly. For example, at a refresh rate of 1˜10 ms/Mbit, the DRAM consumes a great quantity of energy. The refresh process of a 1 Gbit DRAM is responsible for most of the device's total power consumption. However, DRAM memory modules are widely used, because their high power consumption is offset by high speed and competitive price.
If a volatile DRAM can be substituted with a non-volatile memory device, reductions in power consumption and operation initiation period are expected. Thus, various non-volatile memory technologies have been developed. Non-volatile memory that has been most advanced in technologies and most widely used is flash memory. However, flash memory is slow and uses a relatively high voltage. These problems limit the use of flash memory to mobile devices such as digital cameras and mobile phones. One of the important performances required for memory devices is reliability in re-writing operation. Although flash memory has low reliability in re-writing performance, the number of re-writing operations can be set to be smaller when flash memory is used in a mobile device such as a personal digital assistant. However, such a reliability of flash memory in re-writing in a mobile device does not ensure stable operation in a general-purpose PC.
A method of properly combining the DRAM/SRAM/flash memory is used to satisfy the various requirements of recent memory devices. However, this method is expensive and greatly increases the size of the memory chip. Thus, an integrated memory device that can be stably installed into various devices or can be used in various applications is required. It is required that the integrated memory device should have characteristics such as non-volatility, high speed, low power consumption, and highly reliable re-writing. However, a semiconductor memory device having all of these characteristics has not yet been commercially produced. Therefore, various non-volatile memory device technologies are being vigorously developed, and it has been tried to find the possibility of development and commercial usage of those technologies in various aspects.
Meanwhile, non-volatile memory devices, which are referred to as phase-change RAM (PRAM), use a phase-change material which changes resistance according to its crystal structure. PRAM devices store information by controlling a current to change the crystal structure of the phase-change material, and read the stored information using the change of resistance, thereby realizing its memory operation.
PRAM devices can use a chalcogenide metal alloy phase-change material that has been mainly used in optical information storage media, such as CD-RW or DVD. Also, since fabrication processes of the PRAM device closely match those of conventional silicon-substrate devices, the PRAM device can reach or exceed the integration density of the DRAM. Magneto-resistive RAM (MRAM) devices and ferroelectric RAM (FRAM) device are competition to PRAM devices, but have the problems of difficult manufacturing process and miniaturization. Thus, the PRAM device is attracting attention as an leading next generation non-volatile memory device which can replace current flash memory devices.
However, the power consumption of the PRAM device must be greatly reduced to make the PRAM device practical. As described above, since the PRAM device is driven by applying a current to a resistor and using the joule heat to change the crystal structure of a phase-change material, power consumption is likely to be high. Due to the power consumption problem, the PRAM device has just started receiving a great attention in recent years, even though it has favorable merits compared to other non-volatile memory devices.
That is, when a PRAM device is fabricated using a conventional larger-semiconductor device manufacturing process, excessive power and heat that the entire system cannot withstand are generated, thereby making it impossible to realize a practical memory device. However, due to the continuous reduction in design rule and device size, when a PRAM device is fabricated according to a currently common design rule, the power consumption required to operate the PRAM device can be markedly reduced. Reducing the current required to operate the PRAM device is closely related with the high-density integration of the PRAM device. Development of a low power device is necessary in order to secure reliable memory operation of a high-density PRAM device. In the low power device, the power consumption of a phase-change memory array is low.
In addition to the benefit of low power consumption, another important benefit obtainable with the low-power device is reduced heat generation. In particular, information stored in a memory device should not be destructed or changed by heat generated as a particular adjacent memory device operates. Especially, in a highly-integrated memory array where cells are very closed spaced, the heat generated by the operation of a particular memory cell may act as noise and interrupt the memory operation of an adjacent cell.
The following methods are applied to reduce the current required for the operation of the PRAM device.
(1) A first method is an approach in a material aspect. Modifying the phase-change material to lower the temperature required for phase change, by using a material having a relatively low melting point, thereby reducing the necessary current. This method reduces the power consumption of the whole PRAM device by changing the phase-change material itself regardless of the device structure.
(2) A second method is to reduce a required current level by minimizing the phase change region that is an essential part involved in the operation of the PRAM device. The PRAM device changes phase due to heat generated in a contact portion between a phase-change material and an electrode. Thus, the total power consumption of the PRAM device is reduced by minimizing the contact portion. At present, this method is most widely used.
(3) A third method is to optimize the structure of the PRAM device so as to sufficiently utilize the thermal energy of the phase-change material in the device. However, even though the heat generated in the contact portion can be reduced by minimizing the phase change region as in the second method described above, if the generated heat energy cannot be efficiently utilized, a relatively large amount of current has to be applied. Thus, in this method, a suitable device structure is provided so that the heat applied to the phase change region can be fully utilized to change the phase of the phase-change material without leakage, thereby minimizing the total power consumption of the phase-change memory.
When a phase-change memory device is manufactured in a combination of the above-described three methods, the power consumed when operating the phase-change memory device can be reduced the most.
The phase-change material is a chalcogenide metal alloy composed of germanium (Ge)—antimony (Sb)—tellurium (Te). The most common composition is Ge2Sb2Te5(GST), where the composition of germanium-antimony-tellurium is at a ratio of 2:2:5. Since this GST composition has been widely used in optical storage media using phase change by laser beam, its physical characteristics are well known. Thus, GST can easily be applied to the PRAM device. At present, most PRAM devices use GST.
The integration density of a semiconductor memory device using a GST phase-change material (hereinafter, referred to as a GST memory device) can be increased to give a capacity of 256 Mb, and the operation characteristics of the GST memory device are very satisfactory (see S. J. Ahn et al., Tech. Dig. Symp, VLSI Tech 2005, pp 18-19). In the search for a next generation non-volatile memory device, much improved process and technology are required to exceed this integration density. FRAM or MRAM devices can reach only 16˜32 Mb, because of the difficulty in fabrication processes. Thus, the PRAM has excellent scaling characteristics, and is an important replacement for the flash memory of today.
Non-volatile PRAM devices must operate more reliably in a high-density memory module in order to replace conventional flash memory. A gigabit non-volatile PRAM device needs an improved phase-change material. Because the conventional GST phase-change material has a high melting point (about 620° C.), reduction of the operation current is limited. Also, to increase the operation speed of the DRAM, it is necessary to develop a phase-change material having a higher phase change speed, particularly a higher crystallization speed.
Reduction of the power consumption and improvement of the operation speed can be partially realized by improving the device structure or the architecture of a driving circuit. However, since this increases the manufacturing complexity and reduces the uniformity of the device characteristics, it is desirable to improve the characteristics of the PRAM device while maintaining the conventional PRAM device structure, fabricating process, and driving circuit architecture.
A new phase-change material having a lower melting point and higher crystallization speed than GST would allow a high-speed, low power consumption non-volatile PRAM device to be fabricated cheaply and easily.